Fingerprinting Summarizes the History of Internal Processor State Updates into a Cryptographic Signature. the Processors in a Dual Modular Redundant Pair Periodically Exchange and Compare Fingerprints to Corroborate

نویسندگان

  • Jared C. Smolens
  • Brian T. Gold
  • Jangwoo Kim
  • Babak Falsafi
  • James C. Hoe
  • Andreas G. Nowatzyk
چکیده

Recent studies suggest that the softerror rate in microprocessor logic is likely to become a serious reliability concern by 2010. Detecting soft errors in the processor’s core logic presents a new challenge beyond what error-detecting and correcting codes can handle. Currently, commercial microprocessor systems that require an assurance of reliability employ an error-detection scheme based on dual modular redundancy (DMR) in some form—from replicated pipelines within the same die to mirroring of complete processors. These solutions, however, typically require drastic modifications in hardware and/or software to detect and recover from errors. Moreover, current designs rely on tight hardware integration of the DMR processor pair and high interprocessor communication bandwidth, which preclude cost-effective and scalable server architectures. The TRUSS (Total Reliability Using Scalable Servers) project, is building a cost-effective, reliable server architecture from a tightly coupled cluster of rack-mounted server blades. The TRUSS architecture adds support for reliability with minimal changes to the commodity hardware and no changes to the application software. By enforcing distributed redundancy at all processing and storage levels, the TRUSS system can survive any single component failure (memory device, processor, or system ASIC). In the TRUSS architecture, a DMR processor pair is split across different nodes in a system area network. This distributed redundancy provides greater reliability but requires implementing DMR error detection under the limited communication bandwidth and nonnegligible communication latency of the system area network. To detect errors across a distributed DMR pair, we developed fingerprinting, a technique that summarizes a processor’s execution history into a cryptographic signature, or “fingerprint.” More specifically, a fingerprint is a hash value computed on the changes to a processor’s architectural state resulting from a program’s execution. The mirrored processors in a DMR pair exchange and compare a small fingerprint to Jared C. Smolens Brian T. Gold Jangwoo Kim Babak Falsafi James C. Hoe Andreas G. Nowatzyk

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تاریخ انتشار 2009